QSP Labs

The Quality and Security Program Tirol invites to the upcoming Lab:

Oh my Cache! - Introduction to having fun with your Cache

Daniel Gruss
University Assistant, Graz University of Technology
21.10.2016, 13:00-17:00
HSB5 Lecture Room, Hörsaalgebäude (Hörsaaltrakt bei Bauingenieur-Gebäude), Technikerstra├če 13b, Innsbruck

Lab Description

Almost everything the CPU processes passes the cache. Luckily the cache cannot just be read from a process. However, side-channel attacks allow to deduce information in a fine granularity. In this Lab we will learn how to do micro-measurements, basic attack techniques, and run our attacks on real-world applications.
After this lab, participants can perform cache side-channel attacks and other related attacks. Participants will have a basic understanding of what will leak through cache side-channels and can use this understanding to write better, more secure software.

Language: German
Structure: Presentation, exercises with laptops
Required Skills: Experience with Linux, gcc, g++ and inline assembly
Required Equipment: Every participant should bring a laptop or have access to a lab computer with Linux (native!) and a fairly recent gcc/g++ version
Maximal number of participants: 20

About the Expert

Daniel Gruss is a PhD Student at Graz University of Technology. He has done his master's thesis on identifying and minimizing architecture dependent code in operating system kernels.
Daniel's research focuses on software-based side-channel attacks that exploit timing differences in hardware and operating system. In July 2015, he and his colleagues demonstrated the first hardware fault attack performed through a remote website, known as Rowhammer.js.